Next: Nios II, Previous: SPU, Up: Architectures [Contents][Index]

#### 21.4.7 PowerPC

When GDB is debugging the PowerPC architecture, it provides a set of pseudo-registers to enable inspection of 128-bit wide Decimal Floating Point numbers stored in the floating point registers. These values must be stored in two consecutive registers, always starting at an even register like `f0` or `f2`.

The pseudo-registers go from `$dl0` through `$dl15`, and are formed by joining the even/odd register pairs `f0` and `f1` for `$dl0`, `f2` and `f3` for `$dl1` and so on.

For POWER7 processors, GDB provides a set of pseudo-registers, the 64-bit wide Extended Floating Point Registers (‘`f32`’ through ‘`f63`’).